AICS Design Verification Engineer- Multiple levels – Qualcomm

Job Title: AICS Design Verification Engineer- Multiple levels

Location: Vancouver, BC

Job Description: + years of experience with digital design concepts and RTL languages such as SystemVerilog or Verilog, or VHDL. 6+ years

Company Name: Qualcomm

Salary: CA$108000 – 158000 per year

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